The present invention relates to a method of manufacturing semiconductor devices and wafers, and more particularly, to a method of manufacturing a semiconductor device having bumps and a wafer.
Bumps of semiconductor devices are formed by an electroplating method as disclosed in, for example, Japanese Unexamined Patent Publication No. 2004-18964. The method of forming the bumps includes the following steps.
First, seed metal is formed over the entire top surface of a wafer. Second, a resist film is formed over this seed metal and then is exposed to light and developed. These steps form a resist pattern. This resist pattern has openings therein at areas where bumps are to be formed. The seed metal film is exposed at the bottom of the openings.
Then, an electrode is coupled to the seed metal film positioned at an edge of the wafer to supply electric power and the wafer is immersed in a plating solution. Through these steps bumps grow in the openings of the resist pattern.
The wafer is singulated through a dicing step into semiconductor chips as disclosed in Japanese Unexamined Patent Publication Nos. 2007-273941, 2007-214268, and 2004-200195.